Ahmed Louri

Headshot of Ahmed Louri
Title:
David and Marilyn Karlgaard Professor
Office:
SEH 5580 | Office hours: By appointment
Phone:
202-994-8241
Email:
louri@gwu.edu
Website:
hpcat.seas.gwu.edu

 

Professor Ahmed Louri was a member of the faculty of the University of Arizona’s Department of Electrical and Computer Engineering from 1988 to 2015. At the University of Arizona, he also was the chair of the computer engineering program from 2000 to 2006 and the director of the High Performance Computing Architectures and Technologies Laboratory. From 2010 to 2013, he served as a program director in the Directorate for Computer and Information Science and Engineering (CISE) of the National Science Foundation.

Professor Louri is the recipient of the National Science Foundation Research Initiation Award (1989), the Best article Award from IEEE Micro, the Advanced Telecommunications Organization of Japan Fellowship, the Centre Nationale de Recherche Scientifique (CNRS), France, Fellowship, and the Japan Society for the Promotion of Science Fellowship, and several teaching awards. He was instrumental in bringing optical interconnects into mainstream research in interconnection networks and bridging the gap between computer architecture and optics research communities.

Professor Louri is a Fellow of IEEE, a regular member of OSA, a member of the International Society for Optical Engineering working Group on Optical Computing, a member of the IEEE Society Technical Committee on Computer Architecture, and a member of the IEEE Technical Committee on Parallel Processing.

Professor Louri’s primary research interests include computer architecture, parallel and distributed computing, interconnection networks, optical interconnects for parallel computing systems, reconfigurable computing systems, scalable and power-efficient architectures, fault-tolerant multiprocessors, network on chips (NoCs) for multi-core and many-core architectures, fault-tolerant and self-healing NoCs, emerging interconnect technologies (photonic, wireless, RF, hybrid) for multi-core architectures and chip multiprocessors (CMPs), embedded and SoC systems. He has published more than 125 journal articles and conference papers in these areas, and holds several U.S. patents. His research has been sponsored by NSF, DOE, AFOSR, and a number of industrial organizations. 

 

  • Ph.D. 1988, University of Southern California
  • Resilient and Power-Efficient Multi-Function Channel Buffers in Network-on-Chip Architectures
    Dominic DiTomaso, Avinash Kodi, Ahmed Louri and Razvan Bunescu
    IEEE Transactions on Computers, vol. 64, no. 12, pp. 3555-3568, December 2015.

  • Shield: A Reliable Network-on-Chip Router Architecture for Chip Multiprocessors
    Pavan Poluri and Ahmed Louri
    Accepted to appear IEEE Transactions on Parallel and Distributed Systems, 2016

  • A Methodology for Cognitive NoC Design
    Wo-Tak Wu and Ahmed Louri
    IEEE Computer Architecture Letters,issue 99, June 2015.

  • Evaluating Soft Error Tolerant Techniques in Network on Chip Routers
    Pavan Poluri and Ahmed Louri
    Under Review, IEEE Embedded Systems Letters October 2014

  • An Optically Assisted High Speed Scalable IP Router
    Ramana Bhagavatula and Ahmed Louri
    IEEE Optical Communications , 2004.

  • Fellow of the IEEE
  • Associate Editor, IEEE Transactions on Computers
  • Associate Editor, IEEE Transactions on Emerging Topics in Computing
  • Steering Committee Member and Associate Editor, IEEE Transactions on Sustainable Computing