ECE 128 Homepage

Welcome to ECE 128: Design and Testing of VLSI Circuits

Instructor

Prof. Mona Zaghloul
Office Hours: TBD, or by appt.
Email: zaghloul@gwu.edu

GTA

Tom Farmer
Email: tfarmer@gwu.edu

Lectures

In 1776 G rm 106, on Wednesdays from 3:30 - 6:00pm

Labs

In TOMP 411, on Mondays from 4:00 - 5:50pm

Course Objective

VLSI technology has become a major driving force in the development of all types of electronic systems. This course will is a continuation of ECE 126. ASIC design methodology, use of ASIC design CAD tools, and testing methodology will be introduced. An introduction to logic synthesis, styles of synthesis, and the purpose and nature of power/area/speed constraintswill be given. As an introduction to VLSI testing, fault models, design for testability techniques, scan path, JTAG, and Built-in-self-test methods will be incorporated. The course is designed to teach students about Higher Methodology for VLSI design and include Design For Test (DFT) techniques. Student will use VLSI lab to test their designed Chip and will use CADENCE CAD tool to design and include DFT methods.Students must test in the laboratory previously-designed ECE 126 chips. May be taken for graduate credit.

Prerequisites

ECE 126

Grading

Homework	15%
Project & Report	40%
Midterm	15%
Final	30%

NOTE: Makeups for missed exams will be given only if (1) there is a valid, documented reason that the exam cannot be taken at the scheduled time and (2) the instructor is notified IN ADVANCE.

Textbooks

Bushnell and Agrawal, Essentials of Electronics Testing for Digital, Memory & Mixed-Signal VLSI Circuits, Kluwer Academic Publishers,Boston, 2000.
Class notes and other reference materials distributed online.

References

M. J. S. Smith, Application-Specific Integrated Circuits, Addison-Wesley, 1997. "ASICs... the book" available @ DACafe.
Weste & Eshraghian, Principles of CMOS VLSI Design, 2nd. ed., Addison-Wesley, 1993.
J. Rabaey, Digital Integrated Circuits: A Design Perspective, Prentice-Hall, 1996.

Warning: These materials are not a substitute for attending class regularly. Class discussions often cover finer points of the material not included in the notes. You are responsible for all material covered in the class whether or not it appears on the Web.

Course Policies

Grading
Inquiries and disputes about graded work should be made within one week after it has been handed back. Only written inquiries that clearly explain the complaint will be considered.
Late Work
All work must be turned in at the beginning of the class period of the day it is due. Late submissions will not be accepted. All extensions should be arranged with the instructor prior to the due date.
Exams
Make-ups for missed exams will be given only if (1) there is a valid, documented reason that the exam cannot be taken at the scheduled time and (2) the instructor is notified at least 24 hours IN ADVANCE.

University Policy on Cheating and Plagiarism

It is imperative that all graded assignments that you turn in during the course reflect your own understanding of the material. Copying answers from another person impedes the learning process and compromises your integrity. Students are encouraged to discuss homework problems and laboratory assignments with others, but submitted solutions must involve only an individualÆs effort. Any student who copies from another studentÆs homework, quiz, exam, report, etc., or any student who knowingly allows another student to copy his or her work, or any student who submits someone elseÆs work as his or her own, will be deemed guilty of cheating. Cheating is an extremely serious offense. Each student is expected to have read and understood the GWU Code of Academic Integrity (http://www.gwu.edu/~ntegrity/code.html).