Experiment # 8
MOSFET
amplifiers
Equipment: You must make up a complete equipment list and have your instructor review it before you start.
Objectives:
- To verify the operating point for a MOSFET biasing network
- To verify the small signal performance for a given CSC amplifier: RIN, ROUT, Av, Ai , maximum input amplitude without distortion vin max , etc.
- To verify the small signal performance for a given CDC amplifier: RIN, ROUT, Av, Ai , maximum input amplitude without distortion vin max , etc.
- To design a CSC amplifier according to a set of specifications
- To design a CDC amplifier according to a set of specifications
- To establish the relationship between the voltage gain and the load
Figure # 1
1.- (HW) Analysis
- Analyze the circuit shown in Figure # 1 (use nominal values) and find VGG, VG, VS, VD, and ID (assume VDD = 30 Volts DC, K = , Vth = 1.73 V).
- Assemble this circuit on SPICE and perform a bias point detail analysis. Show the calculated voltages and currents by appropriately placing IPROBEs and VIEWPOINTs on your schematic.
2.- Verification
- Build and fully test the circuit shown in Figure #1. Measure , VG, VS, VD, and ID.
3.- (HW) Analysis
For the circuit in Figure # 1. With the values obtained for the bias currents and voltages:
- Assuming that this circuit is operated in CSC (with shorting capacitor):
- Find ROUT, RIN, Avo, Av (RL=ROUT) and Ai (RL=ROUT).
- Also, find the maximum input voltage vin max that the amplifier can accept before the output distorts (loaded and unloaded).
- Assuming that this circuit is operated in CDC (with shorting capacitor):
- Find ROUT, RIN, Avo, Av (RL=ROUT) and Ai (RL=ROUT).
- Also, find the maximum input voltage vin max that the amplifier can accept before the output distorts (loaded and unloaded).
4.- Verification
Build and fully test the circuit shown in Figure #1. By applying a sinusoidal signal such that the small signal approximation holds, measure:
- For the CSC:
- RIN (input impedance) and ROUT (output impedance) of the assembled circuit.
- Voltage gain Av the assembled circuit for the unloaded case, and for RL equal to 2*ROUT, ROUT, ROUT /2, and ROUT /4
.
Find the maximum input voltage that the amplifier can accept before the output distorts (loaded case RL = ROUT). Plot the output signal and the corresponding input.
Determine the phase relationship between the input and output voltages.
Compare the measured results to your analysis calculations.
For the CDC:
- RIN (input impedance) and ROUT (output impedance) of the assembled circuit.
- Voltage gain Av the assembled circuit for the unloaded case, and for RL equal to 2*ROUT, ROUT, ROUT /2, and ROUT /4
.
Find the maximum input voltage that the amplifier can accept before the output distorts (loaded case RL = ROUT). Plot the output signal and the corresponding input.
Determine the phase relationship between the input and output voltages.
Compare the measured results to your analysis calculations.
6.- (HW) Design
Design a Common Source voltage amplifier (with shorting capacitor) similar to the one shown in Fig # 1. Use SPICE to verify that all the specifications have been achieved.
Design Specifications of the Amplifier
VDD = 15 V DC
|AV| > 15RIN > 250 K
W
vin
³
50 mVP (loaded with RL=ROUT)
Maximum Power must occur at 910 W + 5%
- Show all design calculations.
- Compare the SPICE results to your design calculations and specifications and explain any and all differences.
6.- (HW) Design
Design a Common Drain voltage amplifier (with shorting capacitor) similar to the one shown in Fig # 1. Use SPICE to verify that all the specifications have been achieved.
Design Specifications of the Amplifier
VDD = 30 Volts DC
RIN ³
2.5 MW
ROUT £
250
W
vout max ³
6 Volts P (loaded with RL=1k
W)
- Show all design calculations.
- Compare the SPICE results to your design calculations and specifications and explain any and all differences.