HOMEWORK #1

* DUE: WEEK 5, Wednesday (February 11, 1998).

* All problems, figures and page numbers refer to your text Sedra&Smith, 4th Ed.

* When necessary, employ the Q2N3904/Q2N3905 BJT's in your simulations.

* Maximum page limit is 10. All pages after that will be ignored!

(a) Solve problem 6.63 on page 573 of your text.

(b) Verify the approximate expression for Ro by simulating circuit Fig. 6.20 with P-Spice Design Center. Employ the following parameters:

Vee=0 V.

Iref=1mA.

Problem 2: Non-Ideal Characteristics of Differential Amplifiers:

Consider the basic differential amplifier pair shown in Example 6.1, p. 502. Assume that the components shown in this design have the following tolerances:

Rc1, Rc2: Uniform distribution with +/- 5% variation around their nominal values.

beta1, beta2: Uniform distribution with +/- 50% variation around their nominal values.

Suppose these circuits are coming off the production line. What is the worst possible CMRR for this design? Justify your answer with P-Spice Design Center simulations.

Problem 3: Multistage Amplifiers:

Fig. 6.46 shows a multistage amplifier which is a basic configuration for a BJT operational amplifier.

(a) Explain very briefly the role of each of the following BJT stages:

* Q1, Q2

* Q4, Q5

* Q7

* Q8

(b) Perfom a temperature dependent parametric analysis with P-Spice Design Center simulations. Compute the variation in the differential voltage gain Vo/Vid over the temperature range of 25C to 125C. The transistors already have their built in temperature variation model. For each resistor, assume that the temperature variation is as follows:

* R(T) = R_val [ 1.01^( Tce(T-Tnom) ) ].

* Tce=0.01, Tnom=25C.

* Rval=Value of each resistor at 25C as specified in the design.