ECE 182 Transparencies (from Alexandridis'  lectures)
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Syllabus (pdf)
    1. Introduction-Review (pdf)
    2. Computer Systems: Top-Level View (pdf)
    3. Memory Subsystem (pdf)
    4. Bus Transfers (pdf)
    5. Caches (pdf)
    6. I/O Interfacing (pdf)
    7. Web pointer to:  I/O Interfacing & Buses
    8. Interrupts-DMA (pdf)
    9. Memory Management (pdf)
    10. Processor Datapath (pdf)
    11. Single-Cycle Datapath (pdf)
    12. Multicycle Datapath (pdf)
    13. Control Units:
    14. Pipelined Processors (pdf)
    15. Summary - Conclusions (pdf)


            ADDITIONAL (OPTIONAL)  MATERIAL

    1. SDRAMs, EDO-DRAMs, RDRAMs, FPM mode, etc (pdf)
    2. Two articles on Firewire serial bus (art1, art2)
    3. Rambus (pdf)