CS 387: Adv. Topics in Information Assurance -- Architectures for Trusted Computing

Papers for Second Half... Select from this set (or send me papers that you have found and I will consider them and let you know).

• Trusted Computing: 
  
• Presenter: Brad Pittack. Papers: TBD
• Lead ?? Discussers ??
  
• A Trusted Open Platform by England et al, IEEE Computer, July 2003
•  Cryptography and Competition Policy -- Issues with 'Trusted Computing' by Anderson, ACM PODC 2003
• Improving the TCPA Specification by Arbaugh, IEEE Computer, Aug. 2002
  

• Flexible OS Support and Applications for Trusted Computing by Garfinkel, Rosenblum, and Boneh, 9th Hot Topics in Operating Systems (HOTOS-IX), 2003.

• Hardware Based Obfuscation -- Protecting Information and Control Flow
  
• Presenter: Okun
• Lead ?? Discussers ??
  

• H.Shacham et al. On the effectiveness of address-space randomization. Proceedings of the 11th ACM conference on Computer and communications security, Washington DC, 2004.

• Crypto in Hardware --
  
• Presenter: Yu-An  Paper: TBD
  
• Lead ??  Discussers ??
  

• Architectures and VLSI Implementations of the AES-Proposal Rijndael by Sklavos and Koufopavlou, IEEE Transactions on Computers, December 2002 .
• Architectural Support for Fast Symmetric-Key Cryptography by Jerome Burke, John McDonald, and Todd Austin. ASPLOS 2000
• CryptoManiac: A Fast Flexible Architecture for Secure Communication by Lisa Wu, Chris Weaver, and Todd Austin. ISCA 2001.
  

• ISA Randomization
• Presenter: ??  Paper: TBD
• Lead ?? Discussers ??
  
• Randomized Instruction set emulation to disrupt binary code injection attacks.  E. Barrantes, David Ackley, Stephanie Forrest, T. Palmer, et.al., Proc. of Computer and Communications Security (CCS), 2003.
• Countering code injection attacks with instruction set randomization. Gaurav Kc, Angelos D. Keromytis, Vassiliss Prevalakis, Proc. of Computer and Communications Security (CCS), 2003.

• Hardware based Control Flow Protection
• Presenter: ?? Paper: TBD
  
• Lead: ?? Discussers ??
  
• Hardware and Binary Modification Support for Code Pointer Protection From Buffer Overflow by Tuck, Calder, and Verghese. MICRO 2004.
• Enhancing security through hardware-assisted run-time validation of program data properties Divya Arora, Anand Raghunathan, Srivaths Ravi, Niraj K. Jha  Proc. ACM Conf. on Hardware Software Codesign, 2005.
• 
  

• AEGIS Processor using Physical Random Functions
• Presenter: Jeffrey Karrels
• Lead: ?? Discussers ??
  
• Design and Implementation of the AEGIS Single-chip Processor Using Physical Random Functions. G. Edward Suh. Charles W. O'Donnell, Ishan Sachdev, Srinivas Devadas.
  

• Data and Memory Protection 1
• Presenter: Eugen
• Lead:?? Discussers ??
  
• Mondrian Memory Protection, E. Witchel,  J.Cates, K. Asanovic, ASPLOS 2002.
• Data and Memory Protection 2:
• Presenter: ??  Paper: TBD
• Lead ??  Discussers ??
  
• Memory predecryption: Hiding the Latency Overhead of Memory Encryption. Brian Rogers, Yan Solihin, Milos Prvulovic. Proc. ACM SIGARCH Computer Architecture News, Vol.33, No.1, March 2005.
  
•  Minos: Control Data Attack Prevention Orthogonal to Memory Model by Crandall and Chong. MICRO 2004.
•  RIFLE: An Architectural Framework for User-Centric Information-Flow Security by Vachharajani et al, MICRO 2004. (run-time system--not just hardware).
•  High Efficiency Counter Mode Security Architecture via Prediction and Precomputation by Weidong Shi et al, ISCA 2005.

• Architectures for Privacy 1
  
• Presenter: Amin  Paper: TBD
  
• Lead: Chris   Discussers: ??
• Architectures 2
• Presenter: TBD Paper: TBD
• Lead: TBD  Discussers ??
• 
  
•  PRIVACY: Architecture for Protecting Critical Secrets in Microprocessors by Ruby Lee et al, Int. Symposium on Computer Architecture (ISCA) 2005.
• Architectural Support for Protecting User Privacy on Trusted  Processors. Y. Zhang, Jun Yang, Y. Lin,  Lan Gao. ACM SIGARCH Computer News, Vol.33, No.1, March 2005.
• Fast Secure Processor for inhibiting Software Piracy and Tampering. Jun Yang, Y. Zhang, L. Gao. MICRO 2003.
•  Attacks and Risk Analysis for Hardware Supported Software Copy Protection Systems by Shi et al, DRM 2004.
• 
  

• Chip Security/Scan based attacks
• Presenter: Chris Toombs, Paper: TBD
• Lead?? Discussers ??
  
• Secure Scan: A Design for-test Architecture for Crypto Chips.  B. Yang, K. Wu, R. Karri. Proc. ACM IEEE Design Automation Conference, 2005.
• Scan Based Side Channel attacks on Data Encryption Standard,  B. Yang, K. Wu, R. Karri, 2004.
• Scan Based Side Channel attack on Advanced Encryption Standard.  B. Yang, K. Wu, R. Karri, 2005
  
• Side channel Attacks: Ten Years after Publication and the Impacts on Cryptographic Modules Security Testing. YongBin Zhou, DengGuo Feng.
• Power-smart system-on-chip architecture for embedded cryptosystems. R. Muresan, H. Vahedi, Y. Zhanrong, S. Gregori. Proc. ACM Conf. on Hardware Software Codesign, 2005.

• Papers added/suggested by the class:???